Exemplary embodiments relate generally to semiconductor devices and, more particularly, to semiconductor devices capable of reducing the leakage current generated in a transistor.
A semiconductor device, such as a flash memory device, includes a memory cell array region in which memory cells for storing data are formed and a peripheral region in which circuit elements for the operation of the memory cells are formed. The flash memory device can perform data erase and write operations for the memory cells. The flash memory device uses a high voltage to perform the data erase and write operations. A high voltage transistor for transferring or switching the high voltage is formed in the peripheral region of the flash memory device.
The high voltage transistor is used for a high voltage switch, a high voltage pump, a decoder, a page buffer, and a discharge voltage transfer circuit. Further, the high voltage transistor is formed over a gate insulating layer that is thicker than a gate insulating layer formed in the memory cell array region and configured to sufficiently resist the high voltage.
However, the leakage current can be abnormally increased in the high voltage transistor because of several causes, leading to operation errors.